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How is I2S implemented in the ICE 125 and 250? 9 years 1 month ago #15038

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I would like to know where in the signal chain the I2S is located. Specifically, can I incorporate an USB to I2S digital input and can I incorporate a separate DAC via I2S?
Thanks,
mike

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How is I2S implemented in the ICE 125 and 250? 9 years 1 month ago #15058

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Mike,

I'm afraid that the PWR-ICE doesn't have any I2S in/out input on that board. If you want to do a USB input, easiest would really be to use something like a miniStreamer (USB to SPDIF) to basically feed it to the AES-EBU input (SPDIF works fine there).

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How is I2S implemented in the ICE 125 and 250? 9 years 1 month ago #15064

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Dev,
Thanks for the reply. Page 12 of the manual shows an I2S I/O header, which is why I thought that the unit had I2S. What is that used for then?
Thanks again,
Mike

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How is I2S implemented in the ICE 125 and 250? 9 years 1 month ago #15194

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Mike,

Sorry for missing your post... :-(
The answer is that it's for "future". :-) That header isn't tested nor enabled in any places on the MCU firmware and DSP firmware.

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How is I2S implemented in the ICE 125 and 250? 9 years 1 month ago #15232

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Nice, thanks

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How is I2S implemented in the ICE 125 and 250? 9 years 1 day ago #15867

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Dev,

I am currently working on an active speaker project. I am wondering if there is any neat way to add FIR filtering to ICE. I suppose that I2S would be a good way to add miniSHARC. My requirement is to have an analog input to every speaker (unbalanced and balanced) and single analog to digital conversion. The speakers will be plugged to the standard multichannel AVR.

Christopher

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How is I2S implemented in the ICE 125 and 250? 9 years 22 hours ago #15873

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@ Christopher,

Sorry but no FIR on this product. Easiest would be to do it externally (e.g. OpenDRC-DI) and feed AES-EBU to the speakers.
I2S won't be enabled for a while and complete different clocking so miniSHARC + PWR-ICE is very unlikely. External implementation (i.e. OpenDRC-DI) will be plug&play and already works.

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