Welcome, Guest

NOTE: This forum is community powered. Please be mindful that long time community members are here to help as part of a community effort. If you have a specific issue (e.g. hardware, failure), please use our tech support portal (Support menu - > Contact Us). Thanks a lot of your help in making a better community.

TOPIC: How is I2S implemented in the ICE 125 and 250?

How is I2S implemented in the ICE 125 and 250? 3 years 1 month ago #15038

mikefleming2 Offline Fresh Boarder Posts: 3 Karma: 0	I would like to know where in the signal chain the I2S is located. Specifically, can I incorporate an USB to I2S digital input and can I incorporate a separate DAC via I2S? Thanks, mike
	The administrator has disabled public write access.

How is I2S implemented in the ICE 125 and 250? 3 years 1 month ago #15058

devteam Online Administrator Posts: 5837 Thank you received: 708 Karma: 132	Mike, I'm afraid that the PWR-ICE doesn't have any I2S in/out input on that board. If you want to do a USB input, easiest would really be to use something like a miniStreamer (USB to SPDIF) to basically feed it to the AES-EBU input (SPDIF works fine there). DevTeam
	MiniDSP, building a DIY DSP community one board at a time. The administrator has disabled public write access.

How is I2S implemented in the ICE 125 and 250? 3 years 1 month ago #15064

mikefleming2 Offline Fresh Boarder Posts: 3 Karma: 0	Dev, Thanks for the reply. Page 12 of the manual shows an I2S I/O header, which is why I thought that the unit had I2S. What is that used for then? Thanks again, Mike
	The administrator has disabled public write access.

How is I2S implemented in the ICE 125 and 250? 3 years 1 month ago #15194

devteam Online Administrator Posts: 5837 Thank you received: 708 Karma: 132	Mike, Sorry for missing your post... The answer is that it's for "future". That header isn't tested nor enabled in any places on the MCU firmware and DSP firmware. DevTeam
	MiniDSP, building a DIY DSP community one board at a time. The administrator has disabled public write access.

How is I2S implemented in the ICE 125 and 250? 3 years 1 month ago #15232

mikefleming2 Offline Fresh Boarder Posts: 3 Karma: 0	Nice, thanks
	The administrator has disabled public write access.

How is I2S implemented in the ICE 125 and 250? 2 years 11 months ago #15867

kwozniak Offline Fresh Boarder Posts: 1 Karma: 0	Dev, I am currently working on an active speaker project. I am wondering if there is any neat way to add FIR filtering to ICE. I suppose that I2S would be a good way to add miniSHARC. My requirement is to have an analog input to every speaker (unbalanced and balanced) and single analog to digital conversion. The speakers will be plugged to the standard multichannel AVR. Christopher
	The administrator has disabled public write access.

How is I2S implemented in the ICE 125 and 250? 2 years 11 months ago #15873

devteam Online Administrator Posts: 5837 Thank you received: 708 Karma: 132	@ Christopher, Sorry but no FIR on this product. Easiest would be to do it externally (e.g. OpenDRC-DI) and feed AES-EBU to the speakers. I2S won't be enabled for a while and complete different clocking so miniSHARC + PWR-ICE is very unlikely. External implementation (i.e. OpenDRC-DI) will be plug&play and already works. DevTeam
	MiniDSP, building a DIY DSP community one board at a time. The administrator has disabled public write access.

Forum

Community Support

PWR-ICE

How is I2S implemented in the ICE 125 and 250?

Time to create page: 0.120 seconds