TOPIC:

After months of research, designing and testing it is finally time to post the first results of my latest project:
A MiniSHARC based 8-channel True Digital Amplifier
The project is still in its early developments stages, so its not actually a showcase yet, but I still felt it was time to post our current results and get valued feedback and input from this forum to further enhance the design.

The initial idea for this project started somewhere in May 2013. I was on holiday and the weather wasn't all to good that week, so the misses and kids went to bed early. I had plenty of time to do some late night internet research on something that was longtime on my audio wishlist: a active crossover for the speakersystem I designed few years back. I stumbled upon the MiniDSP website and after some investigation I decided that MiniSHARC was the way to go. Flexible, 8 channels, full digital with both I2S in- and outputs and high value for money.
Next step: amplification. We could have gone traditional class AB or A, but we had done that before and its hard to beat existing commercial systems (buy 4 2nd hand NAD C270s and you've got a hell of a 8 channel amp system for the money!). After some late night discussions with my brother, with whom I do most of my audio projects with, we decided to go class D. But class D isn't class D.... Normally you want somekind of negative feedback in an amplifier to reduce THD. To implement this class D amplifier convert the digital input to analog, then use 'digital' PWM based switching amplification followed by a LC network before driving the speaker. The signal after the LC network is fed back to the analog input signal to implement the negative feedback. Hmmmmm, we wanted True digital with minimum parts in the signal path.....

Back to the drawing board. Feedback seemed hard to implement in the digital domain. Undoable for DIY at least. Limited commercial designs exist (eg. patented Zetex technology). So we decided to go without negative feedback and taking all precautions to limit THD etc. We needed superfast FETs and a superclean power supply, because PSRR of a true digital amplifier is virtually zero. And a I2S to PWM processor to control the FET drivers ofcourse. We decided on the parts and final design and a PCB was made.....

Parallel to this we designed the input stage. We wanted 5 SPDIF inputs at least and USB streaming capability. We have designed a input board based on CS8416 and PCM2705C as a USB streamer. We also included a simple DA converter in case we wanted to use the input board with a traditional analog amplifier. The board is equipped with a sample rate converter which converts the digital input to the 48/96kHz of the MiniSHARC.

I have attached picture of both PCBs. Later I will post pictures of the boards with assembled parts (they are at a different location for testing purposes right now). I also have attached a system overview of the intended system.

Currently I'm designing the reclocking/clock-buffer board. As I am not a I2S expert, I need your input....
At the moment MiniSHARC can only act as I2S master, I assume that synchronous reclocking with MiniSHARC masterclock will have limited benefit on ultimate sound quality. But clock fan-out buffering is needed because 5 IC's need the clock signal of the MiniSHARC. So the reclocking system needs bypass possibility. In case the MiniSHARC can act as slave, I assume that the ultimate sound quality will benefit from synchronous reclocking. I'm thinking of reclocking with MCLK of 49.152MHz using 74AUP1G79 and CDCLVC11xx as fan-out buffers. I'll post schematics later.

Please let me know what you think of this system!

Kind regards,
Emiel

Picture 1

Picture 2

Wow!
This is truly impressive.
What are the specs of these amps in term of gain, residual noise in V, THD/IMD, etc. ?

Are you going to release this as a kit?

Agree. This is a really great project!

Besides the very nice amps I like the idea of having an input board with more than the existing three digital inputs (additional analog inputs would be great too btw. I have a board in development ) and the clock distribution board is also very important in such a system.

re the clock board: its definately a good idea to take great care with respect to clock generation and distribution and the suggested use of high speed flipflops and the CDCLVC series fanout buffers sounds good. The question is who should be I2S master. Normaly in such a system the DSP (here miniSHARC) would be the central master, however in this case you'd probably want to feed the external (lower Jitter) MCLK from your clock board. Not sure if this (disable the on board MCLK) might be possible with the miniSHARC board. Probably the only way would be to use an external master clock (e.g. the SRC4193) plus slave firmware for the miniSHARC. Have you thought about a FIFO after the DSP?

Volume control is handled via PSU output voltage?

Great Project

Thanks for the thumbs up!

With regards to the amplifier the distortion and noise figures are not yet available. We are aiming for the THD+N to be around 0.5% and S/N ratio >108dB. Those figures may not look that good upfront, but are actually hard to reach with an open loop amplifier! A lot still depends on the power supply which still has to be designed. We have used FETs with lowest possible drain-to-source resistance and gate / switching charges and drivers with high current capability to limit dead time (and thus THD) to an absolute minimum. This limits the maximum drain to source voltage of the FETs though. Gain of the amp is about 22dB.
With regards to the volume control, we will indeed try to implement this by regulating the output voltage of the power supply. This way the dynamic range will maintain constant over all listening levels.

We did some early listening tests with the amp hooked up to the input board and a lab power supply. Initial results were amazingly good!

We did not yet consider to make it available as a kit It might actually be a good idea. It will take some time though....

Hi Curryman,

We actually had planned for some analog inputs in the beginning. But somehow it always felt a bit 'funny' to have analog inputs on an otherwise completely digital system.
Some late night, after reminding myself that I don't own any equipment with analog outputs but do listen to music from my HTPC quite a lot, I decided to replace the analog inputs for USB streaming capability

I haven't really considered the FIFO yet (I have checked Ian's thread on DIYaudio though). At this time I don't see the real benefits over a good low jitter master clock and reclocking. With regards to the master clock, I'm still thinking how to implement it. Thanks for your input though Do you have some info when the slave firmware will be made available?

Some like to listen to vinyl records despite having a fully digital setup However I can understand your point
Did you integrate the SRC to the input board? Maybe you can route the data through the clock board (just like BCLK, LRCLK,...) and implement a second I2S input on the clock board (mux). Then another I2S source (e.g. ADC ) could be used which does not need a SRC (my ADC ).
BTW. SRC might not be necessary when a new firmware is available. SHARC has several SRCs on chip and DevTeam mentioned that they might release a firmware with SRC at the I2S input. You should get in contact to DevTeam to confirm.

regards, Daniel

We definitely concur! Great project and thanks for sharing! We certainly look forward to seeing that board up and running!
Do let us know when you have something ready and maybe we could do something similar to curryman and push it to the community. I'm sure that you'll find a lot of people interested in such board.

Keep up the good work!
Devteam

As others have said, an interesting project indeed!

I have spent some time considering a similar input board project. Can I ask why you require an ASRC and i2s connection to input to the miniSHARC?

The miniSHARC accepts spdif input up to 192kHz according to the datasheet, has ASRC in the DSP for SPDIF input (not i2s, yet). So why not just take spdif from the MUX chip? That's my plan though I'm using a different spdif mux what will have a few i2s inputs that it will pass out to the spdif output also. Other than that the input board concepts are pretty similar to what I had in mind. I've not seen any details on the performance of the ASRC on SPDIF input but it is something I'd certainly like to experiment with when I get moving on my project.


Regards,
Chris

Thanks Devteam and Chris.

hochopeper wrote:

Can I ask why you require an ASRC and i2s connection to input to the miniSHARC?

First it's good to see that others are working on input boards also, we can share ideas, knowledge and results!

Before starting the design of the input board for the MiniSHARC we had some specific design assumptions and constraints, eg:
1. The audio signal should go through as little steps as possible.
2. The board should be flexible in use for possible future projects or other purposes, so not dedicated to only MiniSHARC (eg. direct connection to digital amp board or traditional amp without MiniSHARC).
3. Everything should be software (SPI) controlled
4. 5 or more S/PDIF coax inputs, 2 or more S/PDIF optical inputs, analog input (which was later replaced by USB streaming capability)
5. Onboard volume control
6. etc.

With regard to design constraint 1:
In case you want to use the S/PDIF input on the MiniSHARC you will have something like the following steps:
1. S/PDIF transceiver (eg. DIX9211 or CS8416) --> 2. OPAMP (to convert to CMOS level) --> 3. MiniSHARC onboard S/PDIF receiver (data / clock recovery) --> 4. Onboard SRC --> 5. DSP. I was/am not sure how steps 3 and 4 are implemented exactly on the MiniSHARC board and thus not sure of the performance (as you mentioned also)
When using I2S input you have the following steps:
1. S/PDIF transceiver (eg. DIX9211 or CS8416) --> 2. Sample rate converter (in our case SRC4193) --> 3. MiniSHARC DSP

With regard to design constraint 2 and 5:
This means that we needed to implement analog output, S/PDIF output and I2S output (both master and slave). Analog output is implemented by the option of connecting a onboard DAC to the SRC4193 output. S/PDIF output is implemented by S/PDIF passthrough possibility of the CS8416. The I2S output of the SRC4193 can be set (by SPI) to either master or slave and to other formats if desired. Also the volume (of I2S and analog) can be controlled via the onboard, SPI controlled, digital attenuation of the SRC4193

Finally I have assumed that it's best to split the data and clock signals as early as possible in the system and keep them seperated.

Regards, Emiel

nemesis80 wrote:

Thanks Devteam and Chris.

hochopeper wrote:

Can I ask why you require an ASRC and i2s connection to input to the miniSHARC?

First it's good to see that others are working on input boards also, we can share ideas, knowledge and results!

Before starting the design of the input board for the MiniSHARC we had some specific design assumptions and constraints, eg:
1. The audio signal should go through as little steps as possible.
2. The board should be flexible in use for possible future projects or other purposes, so not dedicated to only MiniSHARC (eg. direct connection to digital amp board or traditional amp without MiniSHARC).
3. Everything should be software (SPI) controlled
4. 5 or more S/PDIF coax inputs, 2 or more S/PDIF optical inputs, analog input (which was later replaced by USB streaming capability)
5. Onboard volume control
6. etc.

With regard to design constraint 1:
In case you want to use the S/PDIF input on the MiniSHARC you will have something like the following steps:
1. S/PDIF transceiver (eg. DIX9211 or CS8416) --> 2. OPAMP (to convert to CMOS level) --> 3. MiniSHARC onboard S/PDIF receiver (data / clock recovery) --> 4. Onboard SRC --> 5. DSP. I was/am not sure how steps 3 and 4 are implemented exactly on the MiniSHARC board and thus not sure of the performance (as you mentioned also)
When using I2S input you have the following steps:
1. S/PDIF transceiver (eg. DIX9211 or CS8416) --> 2. Sample rate converter (in our case SRC4193) --> 3. MiniSHARC DSP

With regard to design constraint 2 and 5:
This means that we needed to implement analog output, S/PDIF output and I2S output (both master and slave). Analog output is implemented by the option of connecting a onboard DAC to the SRC4193 output. S/PDIF output is implemented by S/PDIF passthrough possibility of the CS8416. The I2S output of the SRC4193 can be set (by SPI) to either master or slave and to other formats if desired. Also the volume (of I2S and analog) can be controlled via the onboard, SPI controlled, digital attenuation of the SRC4193

Finally I have assumed that it's best to split the data and clock signals as early as possible in the system and keep them seperated.

Regards, Emiel

Hi Emiel,

Sounds like a reasonable set of assumptions/design decisions.

I'm actually working on an interface design using PCM9211, I wanted a simple/basic ADC to use on occasions also. For the DIX/PCM9211 the DIT output should be 3.3V level shouldn't it? I had in my mind that it shouldn't need amplification to run into miniSHARC headers.

The i2s output on the DIX/PCM9211 will only work as master so I've got not option for i2s connection until there is a slave mode option available. I'm currently in the process of deciding whether to clock the PCM9211 off the miniSHARC master clock actually, though I will leave an option for using an external master clock to drive them both over u.fl if that option becomes available in the future. I chose the PCM9211 as I've used Ian's board that he designed to go with the FIFO on diyAudio and it seems to have quite robust performance and quite a few configuration/routing options.

Regards,
Chris

Hi Chris,

I did a quick check of the PCM9211 datasheet, it's indeed a very versatile DIX. I think S/PDIF output (through MPIO) are indeed CMOS level.
I also noticed that 2 of the 12 possible inputs have a coaxial amplifier. The other 10 inputs need to be CMOS level.

Somewhere on the forum I read that the slave firmware for MiniSharc will be available very soon, this may impact your design. It simplifies the design I;m currently doing for my reclocking & clock buffer board

Regards, Emiel

I searched about how to send 8 channels of I2S to amplifier. I think a combination of 1 x TAS5088C + 8 (or less) x TAS5631B would be a quite impressive.

Page 102 of www.ti.com/lit/ds/symlink/tas5508c.pdf
and page 17 of www.ti.com/lit/ds/symlink/tas5631b.pdf

This combination may be a big brother to miniAMP though it needs a large power supply (400W x 8 if all driven at mono mode)

Finally an update!

Last few months we took the time to test our first prototypes of the poweramp and preamplifier designs in combination with the MiniSharc.
Initially we had quite some problems with the quality of the I2S clock signals, that's why we decided to redesign the preamp PCB and include clock buffers and keeping signal and clock lines to an absolute minimum. This led to a new PCB design with clock fanout buffers for MCLK, BCLK and LRCLK. MiniSHARC can be plugged straight into the preamp PCB as a "piggyback" (see pictures attached). The 4 2-channel poweramps PCBswill be connected to the preamp PCB with 4 8way IDC connectors.
Simultaneously we tested and designed the power supply for the poweramp. As you may remember the amp design is without feedback and volume control is implemented by control of power supply voltage. This means that we have high requirements for the power supply design. We have tested and measured various 'standard' power supply designs, including various types of linear regulated designs and some switch mode power supplies, including a 2kW Meanwell.
Voltage drop in all tests with these PSUs were to high, so we decided to design our own opamp based superregulator. Initial tests with components we had laying around looked promising.
We have received the new PCBs last week and stuffing the boards is in progress as we speak.
I hope to be testing the new design within a week or so.

Regards, Emiel